Prepare test programs faster and with more control
Creating test programs is often one of the most time-consuming steps in PCB manufacturing preparation. The DFT Preparation Plugin for PCB-Investigator is designed to streamline that work by helping you plan test access, evaluate coverage, and generate machine-ready exports for different test platforms.
In practical engineering workflows, accuracy matters. Whether you are working with ICT or flying probe, manual access placement, repeated corrections, and format-specific export handling can slow down the process and increase the chance of errors.
Support for major tester types and exports
The plugin supports multiple tester types and export targets, including Seica, Takaya, i3070, Elowerk, and SPEA. For ICT testers, needle positions can be generated automatically using rule-based needle sizes and minimum spacing rules based on test points, vias, or THT pins.
For flying probe systems, SMD pads are also available as test access points. Pads are contacted from the outside with an offset approach to reduce the risk of component damage. Targeted short-circuit tests can also be defined using configurable rules. Test accesses can be created automatically, added manually, and refined via drag & drop.
Coverage insight and component-level detail
Another strength is the ability to store test models per component, including parameters such as transistor tests or potentiometer tests. If needed, component contours and test models can be retrieved through the EasyLogix Part Library (EPL), which helps accelerate test-program creation and improves consistency.
Test coverage statistics provide a clearer basis for optimization before export. You can also plan entire panels in one workflow, reducing repetitive work and making the process more scalable for production teams.
Less manual effort, better coverage visibility, and cleaner export readiness.
Built for engineering teams
For engineers responsible for DFT and test preparation, that means a more structured workflow and fewer handoffs between layout analysis and machine output. If you want to reduce manual work and tighten the path from design data to test program, this plugin is worth a look.
Explore the DFT Preparation features and see how much time you can save in your next test-planning workflow.
